Power amplifiers are critical blocks in wireless communication systems. The efficiency of a transceiver is determined primarily by the performance of the power amplifier. The design of the power amplifier involves a tradeoff between linearity and efficiency. The efficiency of a power amplifier in general decreases with reduction in transmitted output power. This poses an issue in the design of efficient power amplifiers. Modern day communication systems utilize higher order complex modulation schemes to maximize the capacity of the channel. This results in a signal waveform that has a high peak to average power ratio (PAPR). In order to preserve the fidelity of the transmitted signal, the power amplifier must operate at an average power level that is significantly lower than the peak achievable power (typically 10 dB back-off). As used herein, back-off power level is a power level that is significantly lower than the peak achievable power, such as a 10 dB back-off from peak achievable power. Operating at a back-off power level results in efficiency degradation at the expense of better linearity. Hence, an efficient power amplifier or transmitter architecture would be one that boosts efficiency at back-off power levels without compromising linearity.
Typically power amplifier designs involve Class A/B/AB architectures that are linear but less efficient in nature. Several techniques have been proposed in literature to counteract this tradeoff. Some of these advanced architectures include envelope tracking, Doherty power amplifier, dynamic load modulation, out-phasing linear amplification using non-linear components (LINC), polar modulation (Envelope Elimination and Reconstruction), digital power amplifier architecture, pulse width modulation and switched capacitor power amplifier architectures. These architectures enhance the efficiency of power amplifiers to some degree but in general these are not efficient for complex modulation schemes. Additionally, due to the complex nature of these architectures, the efficiency-linearity tradeoff now manifests itself as a challenge in the design of other critical blocks. For example, in an out-phasing LINC architecture, the use of switching power amplifiers boosts the efficiency of the system; however, the design of the output power combiner becomes a challenge. In a multi element antenna array system, the efficiency of each power amplifier element dictates the total power consumption of the system. Due to the increased number of elements in a massive multiple-input and multiple-output (MIMO) system, the efficiency of each element becomes important. Using the above techniques in a multi element antenna array system would not be beneficial as they attempt to enhance the efficiency of each element. With power back-off, each power amplifier pixel or element operates at a lower power level thereby degrading the overall efficiency of the system.
In view of the foregoing, it would be desirable to provide an efficient power amplifier or transmitter architecture that boosts efficiency at back-off power levels without compromising linearity.